Bachelor's degree in Electrical Engineering, Computer Engineering, or related field., 4+ years of experience in VLSI design verification, especially in IP and SoC verification., Proficiency in Verilog, SystemVerilog, and UVM/OVM methodologies., Experience with scripting languages like Perl, Python, Shell, or Tcl is preferred..
Key responsibilities:
Verify IPs and SoCs to ensure first silicon success.
Define verification strategies, write test plans, and develop test benches.
Implement code and functional coverage, assertions, and utilize industry-standard methodologies.
Work on various verification activities including GLS, emulation, and protocol verification.
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