Offer summary

Qualifications:

Master's degree in Electrical, Electronic, Computer, or VLSI Engineering Technology., At least four years of experience in UVM/OVM, SystemVerilog, DDR/high-speed interfaces, and coverage-driven verification., Experience in test bench development and post-silicon verification., Strong scripting skills in C and Perl..

Key responsibilities:

Perform semiconductor engineering research, design, development, and testing.

Build and verify design environments using UVM and SystemVerilog, including test plans.

Conduct code reviews and improve testbench quality.

Troubleshoot design failures and performance issues at IP and SoC levels.

Job description

Position Summary

Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy – the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us!

Role and Responsibilities

Perform semiconductor engineering research, design, development, and/or testing for firm products and/or devices for use in the electronic communication industry.
Work with architects and designers to build design verification environments, test benches right from scratch in UVM and SystemVerilog, draft test plans and drive features to successful completion.
Responsible for advanced-level scripting and automation in C/Perl.
Applying best practices using UVM, git, perforce, continuous integration.
Conduct code reviews and provide insights into testbench improvements.
Triaging regressions, debugging design failures at IP-level and SoC level, performance issues.
May work from home on a hybrid schedule within commutable distance of Austin and surrounding areas.

Skills and Qualifications

Minimum Requirements:

Master’s degree or foreign equivalent in Electrical Engineering, Electronic Engineering, Computer Engineering, VLSI Engineering Technology or a closely related field plus four (4) years of experience in a related occupation in each of the following: UVM/OVM, SystemVerilog, DDR/High-speed interfaces, coverage driven verification. Experience must include at least one (1) year of experience in test bench development and post-silicon verification.

Total Rewards

At Samsung – SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $225,750.00 - $270,400.00. Your actual base pay will depend on variables that may include your education skills, qualifications, experience, and work location. This is an exempt position, which is not eligible for overtime pay under the Fair Labor Standards Act (FLSA).

Samsung employees have access to benefits including: medical, dental, vision, life insurance, 401(k), free onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more. In addition, regular full-time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance.

Additionally, this role might be eligible to participate in long term incentive plan and relocation.

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Trade Secrets

By submitting an application, you [applicant] agree[s] not to disclose to Samsung, or induce Samsung to use, any confidential or proprietary information (including trade secrets) belonging to any current or previous employer or other person or entity.

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