Design Verification Lead

Work set-up: 
Full Remote
Contract: 
Experience: 
Senior (5-10 years)

Offer summary

Qualifications:

Minimum 10 years of hands-on experience in SoC/IP design verification., At least 2 years of team leadership or technical delivery ownership., Strong knowledge of verification methodologies, SystemVerilog, and UVM., Experience with complex interfaces like PCIE and DDR in ARM/CHI-based environments..

Key responsibilities:

  • Lead verification planning and execution for SoC/IP designs.
  • Develop and improve testbenches using SystemVerilog and UVM.
  • Oversee debugging, test development, and coverage closure activities.
  • Mentor junior engineers and coordinate with global stakeholders.

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SPERTON - Where Great People Meet SME https://www.sperton.com
51 - 200 Employees
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Job description

🧩 About the Role

We’re hiring experienced DV Leads to join a major semiconductor verification initiative for a European client. You’ll be responsible for leading SoCIP verification efforts across global teams, while working on cuttingedge technologies including ARMbased architectures, CHI protocols, and highspeed interfaces like PCIE and DDR.

πŸ“ Location:

  • EUBased Candidates: Fully Remote (within EU)
  • NonEU Candidates: Remote from the Netherlands (Relocation Required)
        • πŸ•’ Duration: 12month Contract
          πŸ’Ά Rate: €55–€60hour (allinclusive)
          ✈️ Visa Sponsorship: Available for nonEU candidates
          πŸ‘₯ Openings: Multiple
          πŸ›‘οΈ Exclusive Assignment: Exclusive engagement with a toptier European semiconductor program through a trusted consulting partner

          This is a remote contract position:

          • Candidates already in the EU can work from any EU location.
          • Relocation to the Netherlands is supported (and required) for candidates applying from outside the EU.
            • πŸ”§ Key Responsibilities

              • Lead SoCIP Design Verification planning and execution
              • Build and enhance testbenches using SystemVerilog and UVM
              • Oversee debugging, test development, and coverage closure
              • Mentor and guide junior engineers across offshore and onsite teams
              • Work on complex interfaces like PCIE or DDR within ARMCHIbased SoC environments
              • Coordinate crossfunctional deliverables with global stakeholders
              • Manage quality assurance across version control and simulation flows
                • πŸ‘€ Ideal Candidate

                  • 10+ years of handson SoCIP DV experience
                  • 2+ years of team leadership or technical delivery ownership
                  • Strong communicator and problemsolver
                  • Open to relocation (if outside EU) or already residing within EU

                    • 🌍 Who Can Apply
                      EUBased Engineers: Work remotely from anywhere within the EU

                      Global Applicants (India, Sri Lanka, Singapore, USA, etc.): Must be open to relocate to the Netherlands (visa sponsorship provided)

Required profile

Experience

Level of experience: Senior (5-10 years)
Spoken language(s):
English
Check out the description to know which languages are mandatory.

Other Skills

  • Quality Assurance
  • Team Leadership
  • Communication
  • Problem Solving

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