Logic Design Engineer

Remote: 
Full Remote
Contract: 
Work from: 
Israel

Offer summary

Qualifications:

BSc in electrical or computer engineering or relevant military background., At least 7 years of experience in logic design., Proven expertise in RTL coding with SystemVerilog., Experience with FPGA tools like VCS and Vivado is advantageous..

Key responsibilities:

  • Learn system and software requirements for HW-SW interface implementation.
  • Design low-latency, configurable RTL for quantum control hardware.
  • Optimize FPGA logic and timing to meet high-performance standards.
  • Take end-to-end ownership of the coding process from architecture to implementation.

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Quantum Machines https://quantum-machines.co
51 - 200 Employees
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Job description

Description

Quantum Machines is a global leader in control systems for quantum computing, a field on the verge of exponential growth.  

Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands. At the core of QM lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers.  

Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field. 

We are looking for a highly experienced Logic Design Engineer who embodies ambition and positivity. Someone who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfill the evolving needs of our expanding experienced DevOps Engineer customer base.  

Join us in this exciting journey to redefine the future of quantum computing. 


Requirements

Responsibilities:

  • Learning system and SW requirements for proper implementation of HW-SW interface
  • Designing a configurable and very low-latency challenging RTL
  • Bringing the state-of-the-art FPGA to its limits with regards to logic & timing optimization
  • End2end ownership of the entire coding process (Arch->uArch->Design->Implementation)

Requirements:

  • BSc in electrical/computer engineering or relevant military background- Must
  • At least 7 years of experience- Must
  • Proven track record in RTL coding with System Verilog- Must
  • Experience with System Verilog- Must
  • VCS, Vivado - Advantage

Required profile

Experience

Spoken language(s):
English
Check out the description to know which languages are mandatory.

Other Skills

  • Collaboration
  • Problem Solving

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