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Senior Verification Analyst

NR Consulting

Roles & Responsibilities

  • Strong SystemVerilog UVM experience
  • Digital design/RTL verification expertise
  • Experience with verification methodologies/tools (formal verification, coverage, simulation, scripting)
  • Familiarity with AXI protocol

Requirements:

  • Develop and maintain SystemVerilog-UVM based testbenches for complex digital blocks
  • Define and implement verification strategies including formal, coverage-driven verification, and simulation
  • Analyze failures, debug with design and software teams, and drive issue resolution
  • Collaborate with cross-functional teams to ensure verification requirements and schedules are met

Job description


  1. Strong SystemVerilog & UVM experience
  2. Digital design/RTL verification expertise
  3. Experience with verification methodologies/tools (formal verification, coverage, simulation, scripting)
  4. Familiarity with AXI protocol
  5. Familiarity with UCIe would be a nice-to-have
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