Offer summary

Qualifications:

Bachelor's or master's degree in Electronics or related field., 7-10 years of industry experience on live projects., Proficiency in UVM methodology and System Verilog., Experience in IP or SoC level design verification with protocol knowledge..

Key responsibilities:

Lead a team of approximately 5 members on verification projects.

Perform design verification using UVM methodology and System Verilog.

Work on protocols like PCIe, Ethernet, DDR, AXI, SPI, or UART.

Collaborate effectively within diverse teams and communicate technical details clearly.

Job description

Job Position: Senior Design Verification Engineer Relevant Experience: 710 Years
Position: Permanent with Codersbrain Technology Pvt. Ltd.
Location: Bangalore
Notice Period: Immediate to 15 Days.
Client: capgemini

Description:
Qualifications
Bachelors or masters degree in Electronics or related concentration
Experience
710 years of Industry Experience on live projects
Must Have skills (Technical + Behavioral)Methodology: UVM
Languages: System Verilog
Verification knowledge is must. Person should have worked on UVM based design verification
Should have expertise in either IP level DV or SoC level DV
Protocol Knowledge: PCIe OR Ethernet OR DDR OR AXI SPI UART or any other protocol
>7Y Person should have lead a team of ~5 member team for technical side of project
Good oral and written communication skills. This job requires the ability to work effectively within diverse teams.
Good to Have skills (Technical + Behavioral)Knowledge of the Perl Scripting language
Intel project experience

Please Send the documents below for ID verification:
1)Soft Copy of Pancard
2)Passport Size Photo
3)Photo with Pan Card
4)Updated Resume

on career.hr@codersbrain.com