Offer summary

Qualifications:

Bachelor's or master's degree in electrical, electronics, or computer engineering., 5 to 10 years of experience in ASIC/SoC verification., Strong expertise in SystemVerilog and UVM methodology., Hands-on experience with PCIe protocol and verification tools..

Key responsibilities:

Perform SoC and IP-level verification using SystemVerilog and UVM.

Verify ARM-based SoCs and integrate PCIe VIPs.

Execute gate-level simulations and analyze results.

Collaborate with design, architecture, and software teams for verification planning.

Job description

Job Title: Design Verification Engineer (DV)
Experience Required: 5 to 10 Years
Duration: 12 months
Job Location: (Netherlands Remote from Europe)

Job Summary:

We are seeking an experienced Design Verification Engineer with a strong background in SoCIP verification, particularly within the ARM ecosystem. The ideal candidate will possess a high level of expertise in System Verilog, UVM methodology, and functionalcode coverage. In addition to technical acumen, solid communication and analytical skills are essential for customer interfacing and team collaboration.

Key Responsibilities:

Perform SoC and IPlevel verification using System Verilog and UVM.

Work on verification of ARMbased SoCs.

Integrate and use PCIe VIP for verification; handson experience with PCIe protocol is essential.

Execute GLS (Gate Level Simulations) and analyze results.

Develop and analyze functional and code coverage metrics.

Collaborate with design, architecture, and software teams for verification planning and execution.

Manage version control and collaboration using GIT.

Coordinate effectively with both onsite and offshore teams.

Interface with customers as needed and support project milestones.

Qualifications:

Bachelor’s or master’s degree in electricalElectronicsComputer Engineering or related field.

5 to 10 years of experience in ASICSoC verification.

Nice to Have:

Experience in formal verification or lowpower verification flows.

Exposure to scripting (PythonPerl) for automation.

Recruitment Firm:
This recruitment is being managed by Sperton Global.