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Staff Engineer- FPGA RTL Developer

extra holidays
Remote: 
Full Remote
Contract: 
Salary: 
19 - 19K yearly
Experience: 
Senior (5-10 years)
Work from: 
Texas (USA), United States

Offer summary

Qualifications:

Strong foundation in Verilog/SystemVerilog, Extensive experience in FPGA design, Proficient in C/C++ programming, Experience with static timing analysis, Familiarity with Linux-based design environments.

Key responsabilities:

  • Develop RTL designs for complex systems
  • Write and integrate embedded software
  • Collaborate with software and firmware teams
  • Constrain FPGAs for performance optimization
  • Conduct RTL simulations for verification
Pivot + Edge logo
Pivot + Edge Hrtech: Human Resources + Technology Startup https://www.pivotandedge.com/
11 - 50 Employees
See more Pivot + Edge offers

Job description

About Macnica:

Macnica Americas, Inc. is the North American division of Macnica Fuji Electronics Holdings, Inc. a $10 billion technology solutions provider with a stronghold in semiconductor distribution. Macnica excels in customizing solutions to client requirements and leveraging skilled engineers to expedite product development without compromising outcomes for our clients.




Company perks:

  • 15 days of vacation, plus 12 days of national holidays
  • 40 hrs. of paid sick time off
  • Health, dental, and vision insurance
  • 401 (k) with company matching
  • HSA/ FSA


Job Summary:

We are seeking an experienced Senior RTL Engineer to join our hardware design team. This role requires a strong foundation in Verilog/SystemVerilog and C/C++ programming, with extensive experience in FPGA design, simulation, and optimization. The ideal candidate will be skilled in static timing analysis, FPGA constraints, and embedded system development within a Linux-based design environment. As a Senior RTL Engineer, you will work closely with cross-functional teams to develop, test, and optimize FPGA and SoC-based solutions for high-performance applications.


Responsibilities:

  • Develop RTL designs using Verilog and SystemVerilog for complex digital systems.
  • Write and integrate embedded software in C or C++ for hardware interaction, testing, and debugging.
  • Collaborate with software and firmware teams to ensure seamless integration of hardware and software components.
  • Constrain FPGAs for static timing analysis and optimize FPGA builds for performance, resource usage, and power efficiency.
  • Conduct RTL simulations to verify functionality, reliability, and timing.
  • Collaborate with cross-functional teams, including hardware, software, and QA, to ensure project success.

Required profile

Experience

Level of experience: Senior (5-10 years)
Industry :
Hrtech: Human Resources + Technology
Spoken language(s):
English
Check out the description to know which languages are mandatory.

Other Skills

  • Collaboration

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