Principal Digital Design Engineer

This position offers hybrid remote working model

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.

Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.

We are actively seeking an experienced Principal Digital Design Engineer to join our growing data conversion & power management team in Edinburgh, UK.

Job Purpose & Dimensions:

• Interpret high level requirements to architect, design & integrate low-power digital circuits for mixed-signal power management products in advanced process nodes
• Support full product lifecycle from concept to mass-production; communicating closely with wider organisation through the various stages of silicon development
• Provide technical leadership & influence to the digital design team by contributing to technical discussions & reviews, mentoring junior engineers, and supporting recruitment

Principal Accountabilities:

• Ensuring digital development process is state-of-art and achieves budget schedule and project deliverable goals
• Designing digital RTL that meets timing, area, power and any adhering standards specifications
• Integrating design at the top level and running block & top-level simulations
• Participate in all aspects of Mixed-signal design flow - Micro-architecture, Design partitioning, RTL Verilog / SystemVerilog Design, Generating Timing Constraints, Synthesis, Interaction with P&R Team, Timing Analysis, LINT, CDC, RDC, UPF
• Working closely with P&R team to generate a layout that meets timing, area, and power requirements
• Support DFT strategy and implementation and review test case development
• Assisting with top level test-bench debug and running RTL & gate level simulations
• Working with analog and digital verification engineers to come up with complex test scenarios for pre-silicon verification
• Supporting analog team to develop AMS, SystemVerilog or Verilog-real behavioral models
• Developing detailed block & chip level design documents and collateral
• Holding and participating in key design reviews and completion of various checklists
• Document device errata, develop work-around solutions, implement engineering changes when necessary

• >10 years of digital design experience in one of the following areas: wireless handheld, data conversion, and power management
• Degree-level qualification in Electrical Engineering, Electronics, Computer Engineering, Computer Science, or a related discipline
• Fluent in Verilog / SystemVerilog RTL for digital CMOS circuit design
• Strong understanding of ASIC design methodology
• Strong understanding of Linting, CDC & RDC tools
• Strong understanding of block-level & chip-level verification techniques
• Strong & proven ability to debug both RTL & gate-level simulations
• Experience with methodology and flow automation using appropriate scripting
• Experience with Mixed-Signal design methodologies
• Experience with developing design constraints and hand-off to P&R
• Experience with STA & timing closure
• Experience with low-power design techniques, including clock & power gating (UPF)
• Experience with power analysis and optimization
• Experience with advanced verification methodologies (UVM)
• Experience with industry-standard protocols (e.g. AMBA, I2C)
• Mandatory competence in written and verbal English

Renesas Electronics Corporation empowers a safer, smarter and more sustainable future where technology helps make our lives easier. The leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live. Learn more at www.renesas.com. 

Renesas’ mission, To Make Our Lives Easier, is underpinned by our company culture, TAGIE. TAGIE stands for Transparent, Agile, Global, Innovative and Entrepreneurial. Our goal is to embed this unique culture in everything we do to succeed as a company and create trust with our diverse colleagues, customers and stakeholders.

Renesas Electronics is an equal opportunity and affirmative action employer, committed to  supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.