Cybersecurity Firmware Engineer, Mid
Key Role:
Collaborate with a team of creative problem solvers to test and evaluate systems through a Whitebox adversarial approach for a national agency to support military clients. Assess hardware and software-based systems based on the NIST 800-53 risk management framework (RMF) security controls and Raise the Bar (RTB) requirements. Conduct testing and analysis to identify vulnerabilities and potential threat vectors in systems and networks, develop exploits, and engineer attack methodologies. Responsible for code and design reviews for assessing security flaws in VHDL code. Performs code review following coding guidelines and static code analysis. Apply specific functional and working or industry knowledge. Responsible for mentoring junior level staff and maintain technical stakeholder communication. Develop or contribute to solutions to a variety of problems of moderate scope and complexity, when needed.
Basic Qualifications:
3+ years of experience in the electrical or computer engineering with VHDL or Verilog Programming skills
Experience with ASIC design flows and FPGA architecture
Experience in FPGA development flow from logic design, place and route, timing analysis closure, simulation, verification, validation, and benchmarking
Experience with Xilinx, Intel, Lattice, and Microchip FPGA families and corresponding development tools
Experience with Simulation and Synthesis of HDL code
Knowledge of an FPGA device, including Xilinx, Intel, or Microsemi
Ability to mentor, explain, and teach others in regards to complex, technical topics
Ability to obtain a security clearance
HS diploma or GED
Ability to obtain a DoD-8570 IAT-Level II Certification, including Security+ CE, CYSA, SSCP, or GSEC Certification within 6 months of start date
Additional Qualifications:
Experience with higher-level code development, including Nvidia CUDA, OpenCL, Simulink HDL Coder, and Xilinx System Generator
Experience in verification and simulation tools, such as Modalism, Questa-sim or ivavdo Design Suite
Experience with Silicon LABS Simplicity Studio, Eclipse, Git, GitHub, GitLab, or GCC
Experience with fuzzing hardware systems and components
Experience with communication protocols, such as JTAG, UART, I2C or SPI and bus interfaces, such as AMBA and AXI Security, and Monitor IP, Security Watchdog Processor, System on Chip and General Purpose CPU components
Knowledge of Linux distributions, including Redhat, CentOS, Kali Linux, and Python scripting
Knowledge of digital board design of complex mixed-signal boards to support FPGAs
Ability to understand synthesis reports, perform timing analysis and write FPGA design constraints
Possession of excellent interpersonal, communication, collaboration, writing, and presentation skills
Bachelor's degree
Clearance:
Applicants selected will be subject to a security investigation and may need to meet eligibility requirements for access to classified information.
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Salary at Booz Allen is determined by various factors, including but not limited to location, the individual’s particular combination of education, knowledge, skills, competencies, and experience, as well as contract-specific affordability and organizational requirements. The projected compensation range for this position is $60,300.00 to $137,000.00 (annualized USD). The estimate displayed represents the typical salary range for this position and is just one component of Booz Allen’s total compensation package for employees. This posting will close within 90 days from the Posting Date.
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