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Pre-silicon Verification Engineer

Remote:

Full Remote

Salary:

48 - 80K yearly

Experience:

Mid-level (2-5 years)

Work from:

United States

Offer summary

Qualifications:

Bachelor’s degree in Electrical Engineering or related field, Preferred Master’s degree, 1-3 years of experience in verification role, Experience with SystemVerilog and UVM.

Key responsabilities:

Perform simulations of ASIC/SoC designs
Develop test plans, test benches, and coverage models

RLA Engineering LLC Professional Services SME https://www.rlaengineers.com/

51 - 200 Employees

See all jobs

Job description

Job Title: Pre-silicon Verification Engineer (REMOTE PST)

Employee Type: WS

Expected Weekly Hours: 40

Location: REMOTE (PST)

Pay Rate: $40.48 to $41.90 per hour

Position Summary

This position is responsible for supporting engineers in the client’s business unit(s) by performing simulations of ASIC/SoC designs to verify performance vs specifications.

Responsibilities

Understand assigned design needs from an ASIC’s specification, architectural design, functional models, etc. to optimize RTL synthesis planning
Develop test plans, test benches, and test coverage models to verify and debug RTL code and synthesized netlists

Use various hardware description languages
Utilize design for testability methodologies
Use various synthesis tools
Utilize various programming languages for test automation
Develop logical equivalence checking work flows including up to formal equivalence verification

Collaborate with IC design and layout engineers on optimizing specifications, managing constraints and engineering change orders, and determining expected performance limits

Document issues and propose recommendations to team including senior management

Perform other duties as needed

Education And Credential Requirements

Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field; Preferred Master’s degree
Eligible to work in the US without RLA sponsorship for employment visa status

Experience Requirements

1-3 years of experience in a pre-silicon verification engineer role
Minimum 3 years of experience with SystemVerilog and UVM
Minimum 2 years of experience with coding functional coverage (based off of SystemVerilog)
Minimum 2 years of experience with scripting in either Python, Ruby, or C++
Minimum 1 years of exposure to formal methodology
Experience in pre and post silicon verification test flow and automated test benches
Experience converting circuit block diagrams, pseudo code, reference circuit schematics, and other functionality descriptions to RTL using hardware description languages
Experience using various RTL synthesis tools such as Design Compiler, Fusion Complier, Genus, or similar tools
Experience using equivalence checking tools such as Candence Conformal, Synopsys Formality, or similar tools
Experience debugging RTL and netlists through verification workflows
Experience developing test applications/automation and data analysis reports using programming languages such as TCL, Python, Perl, SQL, UNIX bash/Makefile
Experience working on cross functional teams including analog/digital/mixed signal IC design and layout engineers

Skills Requirements

Ability to read, write, and speak English proficiently
High proficiency using productivity software such as M365 (Word, Outlook, Excel, PowerPoint, Visio, Teams, and SharePoint)
Ability to use project/program management principles and methodologies to consistently meet task deadlines, triage changing priorities, and track issues to resolution
Ability to collaborate across diverse teams with a customer service mindset

Work Environment

The position typically operates in a standard office environment and/or from employee’s home
This is a remote position, requiring the employee to be based in the PST time zone
Be able to lift and/or move up to 25 pounds

#Remote