Offer summary
Qualifications:
BS or MS degree in Electrical Engineering or related field, 3-5 years of proven experience in hardware design development, Expertise in HDLs: Verilog, SystemVerilog, VHDL, SystemC, Expertise in UVM environments and Formal Verification, Experience in scripting and front-end verification workflows.
Key responsabilities:
- Develop, configure, and customize the hardware design platform for LLM training data
- Translate research team requirements into actionable data insights
- Ensure top coding, debugging, and documentation standards
- Collaborate with teams to prioritize needs for LLM performance