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Senior ASIC Design Engineer

82% Flex

EXTRA HOLIDAYS - FULLY FLEXIBLE

Remote:

Full Remote

Contract:

Full time

Salary:

164 - 305K yearly

Experience:

Senior (5-10 years)

Work from:

California (USA), North Carolina (USA), Washington (USA), United States

Offer summary

Qualifications:

Bachelor's Degree in EE, CE or CS., 8+ years of relevant experience., Experience in RTL development (Verilog)., Understanding of ASIC design flow., Exposure to Digital systems and VLSI..

Key responsabilities:

Implement high-performance RTL designs.
Analyze trade-offs for architectural decisions.
Collaborate with cross-functional teams.
Architect features for silicon debug.
Develop IPs like GPU scheduler and DMA engines.

NVIDIA XLarge http://www.nvidia.com/

10001 Employees

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Job description

Your missions

We are now looking for a Senior ASIC Design Engineer.

NVIDIA is seeking ASIC Design Engineers to implement the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing!

What you'll be doing:

As a key member of the GPU Design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
Analyze architectural trade-offs based on features, performance requirements and system limitations.
Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design.
Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks.
Work on a broad list of IPs such as GPU's work scheduler, time distribution system, interrupt controllers, and DMA engines.
Architect features to help silicon debug and support post-silicon validation activities.

What we need to see:

Bachelors Degree or equivalent experience in Electrical Engineering, Computer Engineering or Computer Science.
8+ years of meaningful work experience.
Experience in micro-architecture and RTL development (Verilog), focused on arbiters, scheduling, synchronization & bus protocols, interconnect networks and/or caches.
Great understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis.
Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is required.
Strong interpersonal skills and an excellent teammate.

Ways to stand out from the crowd:

Strong C/C++, Python or Perl skills.
Good debugging and analytical skills.

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you.

The base salary range is 164,000 USD - 304,750 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

You will also be eligible for equity and benefits. NVIDIA accepts applications on an ongoing basis.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.