Offer summary

Qualifications:

Currently pursuing or recently completed a Master’s degree in Computer Science, Cybersecurity, Electrical Engineering, or a related field., Proven experience with FPGA development and prototyping., Proficiency in hardware description languages (HDLs) such as Verilog or VHDL and low-level programming languages like C, C++, and RISC-V assembly., Strong understanding of digital design principles, embedded systems, and cryptographic hardware implementations..

Key responsibilities:

Integrate TrustSys hardware into CALIPTRA hardware and ensure compliance.

Write firmware for TrustSys to be CALIPTRA compliant.

Create FPGA based demonstrators using CALIPTRA firmware on both CALIPTRA and TrustSys hardware.

Develop marketing materials and present key challenges and lessons learned at the end of the internship.

Job description

Start: June 2025

Duration: 3-6 months (Master Thesis internship)

Location: Oxford, London, Paris, or remotely

Supervisor: Octavian Maciu

💼 About the role

We have been established since 2018, so you would be directly working with the founders and inventors of this deep tech startup. This is a great opportunity for career progression and to make an immediate impact in a rapidly expanding segment of the semiconductor industry (Post-Quantum Cryptography and RISC-V).

CALIPTRA is widely used as the Root of Trust for Baseboard Management Controllers (BMC) in a datacenter setting. Recent power side-channel attacjs on CALIPTRA have highlighted that it was built according to a different threat model than our Root of trust that is aimed for platform security use cases and protects against physical attackers.

This internship goal is to replace the CALIPTRA hardware with our own Root of Trust solution (TrustSys), such that all CALIPTRA firmware can be executed without modifications. It aims at creating an FPGA based demonstrator that showcases CALIPTRA and the TrustSys-based Root of Trust.

⚒️ What you’ll be doing

Integrate TrustSys hardware into CALIPTRA hardware
Write firmware for TrustSys to be CALIPTRA compliant
Create an FPGA based demonstrator booting up using CALIPTRA firmware running on CALIPTRA hardware
Create an FPGA based demonstrator booting up using CALIPTRA firmware running on TrustSys hardware

🔑 Key deliverables

TrustSys hardware integrated into CALIPTRA hardware
TrustSys hardware is CALIPTRA compliant
Secure boot FPGA demonstrator using CALIPTRA firmware and hardware
Secure boot FPGA demonstrator using CALIPTRA firmware and TrustSys hardware
Creation of marketing materials such as slides, blog posts, and sales enablement documents.
A final presentation summarizing key challenges and lessons learned.

🎯 Required Skills And Qualifications

Currently pursuing or recently completed a Master’s degree in Computer Science, Cybersecurity, Electrical Engineering, or a related field.
Proven experience with FPGA development and prototyping.
Proficiency in hardware description languages (HDLs) such as Verilog or VHDL.
Strong understanding of digital design principles and embedded systems.
Proficiency in low-level programming languages such as C, C++, and RISC-V assembly.
Familiarity with cryptographic hardware implementations and security testing methodologies.
Excellent collaborative and communication skills.
Strong analytical and problem-solving abilities.

🏆Some of the perks of working with us:

Unparalleled opportunities to learn and accelerated career development.
A collaborative, team environment with people who truly love what they do.
Competitive salary and share option scheme.
Flexible and hybrid working, and a working from home budget.
Private health insurance for yourself and your family.
25 days annual leave (plus bank holidays and two wellness weeks).
50% gym membership discount.
The chance to work with a spirited, smart, and friendly team!

PQShield is an Equal Employment Opportunity employer. We’re passionate about talent and proud to foster an inclusive environment; all applicants will be considered regardless of their gender identity, ethnicity, sexual orientation, disability, and age.

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