Offer summary
Qualifications:
M.S. or Ph.D. in Electrical Engineering, Over 8 years of experience in mixed signal, 3+ years in a leadership role, Expertise in Verilog or SystemVerilog.Key responsabilities:
- Lead and mentor a team of engineers
- Supervise planning and specification of algorithms
- Guide design of digital circuits
- Ensure verification of digital designs
- Drive silicon bring-up efforts and optimization